data brief for further information contact your local stmicroelectronics sales office. rev. 2 august 2005 1/8 8 XRAG2 uhf, epcglobal class-1 generation-2, contactless memory chip 432 bit with multi-session protocol, anti-collision and kill functions features summary epcglobal class-1 generation-2 specification passive operation (no battery required) uhf carrier frequencies from 860 mhz to 960 mhz ism band which comply with: ? north american regulations ? european regulations ? and other countries where similar regulations apply to the XRAG2: ? asynchronous 90% ssb-ask, dsb-ask or pr-ask modulation using pulse interval encoding (up to 128 kbps) from the XRAG2: ? backscattered reflective answers using fm0 or miller bit coding (up to 640 kbps) 432-bit memory with two possible configurations: ? 3 memory banks: 64-bit tid, 304-bit epc and 64-bit reserved ? 4 memory banks: 128-bit user, 64-bit tid, 176-bit epc and 64-bit reserved multi-session protocol anti-collision functionality inventory, read, write and erase features kill command 100-ms programming time (max) for 288-bit programming (epc code, protocol control bits and crc16) more than 10,000 write/erase cycles over 40 year data retention figure 1. delivery forms unsawn unbumped wafers or sawn and bumped wafers www.st.com
1 summary description XRAG2 2/8 1 summary description the XRAG2 is a full-featured, low-cost integrated circuit for use in radio frequency identification (rfid) transponders (tags) operating at uhf frequencies. it is a 432-bit memory organized in 16-bit words in 3 or 4 memory banks as shown in figure 3 and figure 4 . when connected to an antenna, the operating power is derived from rf energy produced by the rfid reader. incoming data are demodulated and decoded from the received double-side band amplitude shift keying (dsb-ask), single-side band amplitude shift keying (ssb-ask) or phase-reversal amplitude shift keying modulation signal. outgoing data are generated by antenna reflectivity variations using either the fm0 or miller bit coding principle (rfid reader parameter). a kill function is provided to permanently disable the tag. anti-collision features enable the rapid inventorying of tag populations. communication between reader and tag are half-duplex meaning that tags do not decode reader commands while backscattering. the data transfer rate is defined by the local uhf frequency regulations. the XRAG2 is fully compliant with the epc global class-1 generation-2 uhf rfid specification (revision 1.0.9) for the radio-frequency power and signal interface. the reader and the XRAG2 dialog through the following consecutive operations known as rtf (reader talk first) communication: activation of the XRAG2 by the uhf operating field of the reader transmission of a command by the reader transmission of a response by the XRAG2 table 1. signal names the XRAG2 is specifically designed for extended range applications that need automatic item identification. the XRAG2 provides a fast and flexible anti-collision protocol that is robust in noisy and unpredictable rf conditions typical of rfid applications. the XRAG2 eeprom memory can be read and write which enable users to program the epc code and user memory at the point of application, if desired. figure 2. pad connections ac1 antenna pad ac0 antenna pad (gnd) memory power supply regulator demodulator ask reflecting modulator eeprom ac1 ac0 432-bit
XRAG2 2 XRAG2 memory mapping 3/8 2 XRAG2 memory mapping the XRAG2 is a 432-bit memory divided into a 3-memory bank (without user memory) or 4-memory bank (with user memory) configuration. each bank is organized into 16-bit words. the reader can read part or all of each memory bank in single or multiple groups of 16-bit words. use the write command to write to device memory using 16-bit words. the blockwrite command enables readers to write up to four 16-bit words to device memory at a single time. erase multiple 16-bit words (up to the complete memory bank) using the blockerase command. note: the 64-bit tid memory content is written by stmicroelectronics during the manufacturing process in compliance with the iso 15963 technical report in order to comply with iso 18000 recommendations. figure 3 describes the three-memory bank configuration. table 2. memory bank description memory bank description user user-specific data tid (tag-identification data) manufacturer and custom information epc (electronic product code) crc-16, protocol control and item identification code (epc) reserved kill and access passwords figure 3. three-memory bank configuration tid bank reserved bank epc bank 64-bit 304-bit 64-bit tid tid tid tid = e002h 30h 20h 10h 00h 3fh 2fh 1fh 0fh access password access password kill password kill password 30h 20h 10h 00h 3fh 2fh 1fh 0fh rfu epc ... up to 256 epc bit 120h 110h ... ... 12fh 11fh ... ... ... epc (pc+epc) length crc16 ... 20h 10h 00h ... 2fh 1fh 0fh afi/nsi bank 10 bank 01 bank 00
2 XRAG2 memory mapping XRAG2 4/8 the four-memory bank configuration is shown in figure 4 . figure 4. four-memory bank configuration tid bank user bank reserved bank epc bank 128-bit 64-bit 176-bit 64-bit tid tid tid tid = e002h 30h 20h 10h 00h 3fh 2fh 1fh 0fh access password access password kill password kill password 30h 20h 10h 00h 3fh 2fh 1fh 0fh dsfid epc ... up to 128 epc bit a0h 90h ... ... afh 9fh ... ... ... epc (pc+epc) length crc16 ... 20h 10h 00h ... 2fh 1fh 0fh afi/nsi user ... user user 70h ... 10h 00h 7fh ... 1fh 0fh bank 10 bank 01 bank 00 bank 11
XRAG2 3 XRAG2 commands 5/8 3 XRAG2 commands the XRAG2 offers select, inventory, and access commands sets supported as defined in epcglobal class-1 generation-2 uhf rfid specifications (revision 1.0.9). table 3. XRAG2 commands command set available commands select command set select inventory command set query, queryadjust, queryrep, ack and nak access command set req_rn, read, write, kill, lock, access, blockwrite and blockerase
4 part numbering XRAG2 6/8 4 part numbering table 4. ordering information scheme note: for further information on any aspect of this device, please contact your nearest st sales office. example: XRAG2 - w4i / xxx device type XRAG2 delivery form w4i = 180m 15m unsawn inkless wafer sbn18i = 180 m 15m bumped and sawn inkless wafer on 8 inch frame customer code xxx = customer code, given by stmicroelectronics
XRAG2 5 revision history 7/8 5 revision history date revision changes 18-jul-2005 1.0 initial release. 17-aug-2005 2.0 replaced tid = e202h by tid = e002h in figure 3 and figure 4 .
5 revision history XRAG2 8/8 information furnished is believed to be accurate and reliable. however, stmicroelectronics assu mes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners ? 2005 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com
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